L3MATRIX – Silicon Photonics Switching Matrix for Large Scale Networks


L3MATRIX is an EU Horizon 2020 research project (grant number 688544) of 36 month duration (1 December 2015 – 30 November 2018) developing the next generation of data-centre infrastructure. Reducing the power consumption and minimizing the number of non-revenue generating devices such as switches and links would allow the operators to deploy more servers and storage elements thereby increasing the DC throughput and increasing the revenues.

Cloud storage and computing, big data analytics and social media are driving the need for higher bandwidth communications in data centres (DCs). Concurrently, disaggregation and virtualization trends in the data-centre are forcing the traffic to be between servers and storage elements in the east-west direction. These changes require massive switching capabilities from the discrete switch elements. However, the technology is rapidly reaching a limit. The result is a multi-layered DC topology with high power consumption and long latency.

The L3MATRIX project provides novel technological innovations in the fields of silicon photonics (SiP) and 3D device integration. The project will develop a novel SiP matrix with a scale larger than any similar device with more than 100 modulators on a single chip and will integrate embedded laser sources with a logic chip thus breaking the limitations on the bandwidth-distance product.

The main focus of the project is the design and heterogeneous/ hybrid integration on silicon of lasers and other optical devices for PIC-based high-performance and high-density modules. A novel approach will be used with embedded III-V sources on the SOI substrate which will eliminate the need to use an external light source for the modulators. L3MATRIX provides a new method of building switching elements that are both high radix and have an extended bandwidth of 25 Gb/s in single mode fibres and waveguides with low latency. The power consumption of DC networks built with these devices is 10-fold lower compared to the conventional technology. The outcome of this approach is that large networks, in the Pb/s scale can be built as a single stage, non-blocking network. The single mode nature of the SiP chip allows scaling the network to the 2000 m range required in modern DCs.

With a budget of 3 Million Euro over 3 years, the project brings together European leading companies, universities and research institutes with strong expertise and experience in the fields of silicon photonics, III-V materials and 3D device integration.
The consortium with 8 partners from 6 different EU member states and two associated countries (Switzerland and Israel) is led by Fraunhofer IZM (Berlin, Germany) as project coordinator, and Dust Photonics (Tel Aviv - Jaffa, Israel) as technological manager. Further partners include AMS AG (Graz, Austria), IBM Research (Zurich, Switzerland), Aristotelio Panepistimio Thessalonikis (Thessaloniki, Greece), Universitat Politecnica de Valencia (Valencia, Spain), BRIGHT Photonics BV (Eindhoven, Netherlands) and University College London (London, United Kingdom) (http://l3matrix.eu/).

The Fraunhofer Gesellschaft is the leading organization for applied research in Europe, with 60 Fraunhofer Institutes at over 40 locations throughout Germany. The Fraunhofer-Gesellschaft employs around 20,000 personnel and has a total annual research budget of EUR 1.8 billion. Some two thirds of this sum is generated through contract research on behalf of industry and publicly funded research projects. Branches in the USA and Asia promote international cooperation.