Within the project, Fraunhofer IZM is investigating the design and manufacturing of photonic integrated circuits (PICs). One key step is the development of a platform technology for application specific systems containing PICs. Here, Fraunhofer IZMs research efforts are working towards a II-V semiconductor-compatible silicon interposer technology.
Here, Fraunhofer IZM successfully developed a through silicon via (TSV) technology in gold featuring TSVs and a patterned double-sided metallization. Such a copper-free metallization is an important technology for photonic packaging ((III-V semiconductors). Test vehicles with a coplanar waveguide and TSVs have been realized and compared to a conventional wire bonded waveguide. The TSVs have diameter of 200 µm and a depth of 400 µm, the waveguide length is 100 mm. The target was to reduce the crosstalk and attenuation by using TSVs. The measurements carried out by the project partner CIP show a significant performance gain. The attenuation was considerably lower (2 db at 40 GHz) and the crosstalk showed a more flat course.