3D stack formation includes the realization of chip-to-wafer, chip-to-interposer, chip-to-chip-to-wafer as well as derived assembly types by using TSVs in the devices. Fraunhofer IZM possesses the technical and technological requisites for 3D stacking of singulated chips via flip-chip bonding (D2W, D2D). Precision reaches up to 3 μm @ 3 Sigma for a maximum chip size of von 20 x 20 mm², a minimum chip thickness of 50 μm an a maximum of 10 stacked chips by using flux-activated soldering technologies (SnAg, Sn).
- Plasma Cleaning/ Activation
- Flip Chip Bonding
- External Reflow
- Vacuum Reflow
- Flip Chip Underfill Dispension