Training

 

Courses for Chip and Wire Bonding

Chip and Wire bonding represents the largest part of all interconnection technologies used in semiconductor assembly and is constantly being used, optimized and further developed at Fraunhofer IZM.
 

Working group Design conformity for WEEE/RoHS/EuP

Despite the success with the implementation of the EU Directives WEEE and RoHS, companies in the electronics industry are still working on meeting the environmental demands they raise for the European market.
 

Working group System reliability of packaging technologies

Up to this point the main focus of quality and reliability considerations was put on specific issues of packaging technology. As of now the interdependency and impact on the overall system of various components and its packaging becomes the focus of research and development due to its increasing importance.
 

Education in the Field of Assembly Technology

Two technologies have emerged to push miniaturization into the next millenium, both using bare die to attach them directly to the circuit card: Chip-and-Wire Technology and Area Array Packaging/Assembly (FC, CSP, BGA). The Fraunhofer IZM has taken up the challenge to provide deep insight into the processes to manufacturing personnel, production engineers and managers of production facilities in order to keep them ready for the future of production.