25. August 2026 | erschienen im Fraunhofer TechNewsletter 3/2026
The APECS pilot line is part of Europe’s response to the challenge of regaining »pole position« in the international race for innovation and sovereignty in semiconductor technology! The starting gun has long since been fired, and the race to catch up is in full swing. And with every pit stop, the vehicle becomes more powerful.
Europe faces a key challenge: Its share of global semiconductor value added currently stands at only about 8 percent. The clear goal is to increase this figure in the coming years. At the same time, recent years have shown just how vulnerable global semiconductor supply chains are and how strongly technological dependencies can influence innovation capacity and competitive strength.
With the European Chips Act, the EU presented a set of measures in 2021 specifically designed to address these challenges. The establishment of pan-European pilot lines is a fundamental part of this effort.
As an integration platform for heterogeneous systems, APECS (Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems) plays a key role. The focus is on integrating advanced nodes, semiconductors, and energy-efficient processors into chiplet architectures using advanced packaging technologies, followed by validation of process and functional reliability. APECS is geared toward key future fields in microelectronics - ranging from AI and high-performance systems to power electronics and photonic applications. Thus, the pilot line addresses not only individual sectors but also the technological foundation of an increasingly digitized and networked industry.
Investments with strategic leverage
The scale of this initiative is substantial: 730 million euros have been earmarked for the development of the APECS pilot line – as part of a total investment of up to 100 billion euros slated to flow into microelectronics in Europe over the coming years.
At Fraunhofer IZM, this vision is taking shape. We have already begun investing around 90 million euros in new technologies and are in the midst of expanding our infrastructure in a targeted manner. At the heart of this effort are approximately 40 state-of-the-art tools and systems, with which we are setting new standards in system integration and packaging for microelectronics.
This creates a development environment that significantly accelerates the transition from research to industrial applications – and gives companies a technological edge.
Benefit from APECS now
For companies, this means in concrete terms: APECS expands access to state-of-the-art packaging and integration technologies. In addition to the development and validation of new approaches, the pilot line also enables the production of prototypes and very small production runs under realistic conditions. Even now!
Within APECS, Fraunhofer IZM plays a central role as a driver of innovation in heterointegration and as an interface between technology development and industrial implementation. Fraunhofer IZM is part of the FMD (Research Fab Microelectronics Germany) interposer platform, which enables the flexible implementation of chiplets and system-in-packages using glass, silicon, or organic materials. The technology portfolio ranges from interposer and fan-out technologies to 3D integration processes such as wafer-to-wafer and die-to-wafer bonding, hybrid bonding, and the functionalization of bumps.
This gives companies the opportunity to test and qualify system architectures at an early stage and transition them more quickly into industrial applications. Especially in highly competitive markets, these time savings can be decisive.
Concrete added value for companies
SMEs and startups in particular benefit: They can access state-of-the-art equipment and specialized expertise that would be virtually unavailable to them individually, and bring innovations to market more quickly.
APECS thus not only creates infrastructure but also provides new access to innovation – open, scalable, and compatible with various players in the European technology ecosystem. At the same time, value creation in microelectronics is undergoing a fundamental shift: the traditional separation between chip manufacturing (front-end) and assembly and interconnection technology (back-end) is increasingly breaking down. It is precisely this trend that is giving rise to new cooperation models and innovation potential.
Through the FMD, companies gain structured access (OSSO) to the APECS pilot line. Collaborations and pilot projects make it possible to test technologies at an early stage and develop them in a targeted manner.
APECS is the platform for your applications of tomorrow
For us, one thing is clear: Anyone who wants to help shape the next generation of electronic systems needs not only excellent research but also access to an infrastructure that brings together development, validation, and application. This is precisely where APECS’s particular strength lies, and it is something your company can already benefit from today.
Let’s explore how you can use the APECS pilot line for your development projects. We look forward to exchanging ideas with you and to meeting you in person at events such as the FIRST Conference in Berlin.
Prof. Dr.-Ing. Ulrike Ganesh
Director Fraunhofer IZM