Workshop  /  July 02, 2025  -  July 03, 2025

Workshop on Component-to-System Level Packaging

Addressing Integration Challenges for Automotive and Industrial Applications

The road to autonomous driving and the need for more electrified mobility have resulted in sizable changes for electronics such as semiconductors and batteries used in automotive applications.  Smart homes and infrastructure, factory automation and preventive maintenance have driven significant advancements in industrial electronics too.

These applications demand significant system miniaturization through complex chiplet concepts and heterogenous integration solutions for processors, memories, power management along with sensors and MEMS, wireless and optical connectivity and other advanced communication components and systems.

Though assembly levels 0 and 1, with chip-package interaction challenges addressed, packaged device/components formation is enabled. Assembly levels 2 and 3 (board and system assembly) are indispensable from system level integration and final product/system performance points of view. With heterogenous integration solutions and miniaturization, the board as we know it today is partially moving inside the package, and System-in-Package (SiP) is created.

Advancements in compute and storage for automotive applications, sensor technologies with mmWave Radar, LIDAR, and other sensing techniques along with integrated power systems for EV with high voltage, high power components and modules are bringing new challenges to both, Component-Level Packaging (CLP) and Board/System-Level-Packaging (SLP). Power delivery, thermal management, assembly and reliability at component/system level demand innovative design approaches, materials and assembly processes for high reliability automotive and industrial requirements.