Key Research Areas

Due to the low switching losses when using the novel wide band-gap semiconductor generation made from gallium nitride and silicon carbide, respectively, it is possible to increase the switching frequency of power electronic systems significantly. As a consequence, the size of passive components, especially of the bulky ripple inductors, can be reduced, for the reason that less energy needs to be buffered in the system. The focus of the ECPE lighthouse project "Industrial Demonstrator on System Level" was on an additional power density increase by means of innovations in filter topology, semiconductor control and pareto front optimization of the overall system.

The control system gathers all measured values simultaneously and regulates the duty cycles of all six half bridges. The operation parameters can be transmitted using various interfaces (USB, CAN-Bus and Ethernet) or directly adjusted on the control panel. According to the electrical load conditions the control system supports the application of different operation modes (DCM, CCM, flat top modulation) during one mains period and rotary field period, respectively. In this way, die voltage-time-area of the PFC and motor inductors and thus their size can be further reduced. The size reduction of the CM filter is achieved by shifting the CM voltage into the DC link.

A further increase in power density can be achieved with Pareto front optimization. The required loss, EMC, thermal and volume models of all relevant components were developed and validated within this project.

The utilized low inductive SiC semiconductor power modules are developed in the context of the ECPE project "Switching Cell in Package". The project goal was the design of modular and scalable Power Electronics Building Blocks (msPEBBs). An additional innovation is the application of Chip Scale Packages (CSPs), which enables the DCB/PCB based power module manufacturing without the requirements for a clean room.