Wafer Level System Integration

With respect to the requirements of future microelectronic systems, 3D integration plays an important role for heterogeneous system integration - meaning the integration of different multi-functional components in one package.

Wafer Level System Integration

The department "Wafer Level System Integration" (WLSI)  specializing in developing advanced packaging and system integration technologies thus being able to offer customer-specific solutions for microelectronic products in the overall scope of smart system integration.

Within the department approx. 60 scientists work at these topics at two locations: Berlin and Dresden (ASSID: All Silicon System Integration Dresden).

The department offers prototyping, small-volume production and a broad spectrum of R&D services to partners and customers. In numerous R&D projects, ongoing skills and know-how are continuously being developed which can be passed to SME-partners on a development stage. WLSI has also established a broad cooperation network with manufacturer and users of microelectronic products as well as with cleanroom equipment producers and material developers from the chemical industry from all over the world.

The department "Wafer Level System Integration" (WLSI)  focuses its research activities on technologies for wafer level system integration and packaging which are exclusively related to wafer processing. To cover a broad range of research aspects, the department WLSI is actively working in six major research areas.

For further information use the list below to directly enter your topic of interest.

2.5/3D Technologies

  • TSV Integration
  • Silicon interposer TSV first
    • TSV via middle
    • TSV via last
    • Device stack

High Density Redistribution




  • Back grinding tape lamination
  • Wafer backgrinding
  • Polishing
  • mechanical blade dicing
  • laser grooving
  • laser stealth dicing
  • wafer edge trimming

High-Density Assembly

  • Fine pitch assembly for pixel detectoren
  • Interconnect metallurgy and processes
  • Thermo compression bonding
  • Chip-Stacking
  • Fine-pitch flip chip (FC) assembly & die bonding
  • Wafer-level solder ball attach (100 – 500 μm)
  • Evaluation of low-temperature assembly technologies
  • Evaluation of flux free solder connections with self alignment capability
  • Reliability investigation of flip chip interconnections

Failure Analysis & Reliability Investigation

  • Metrology: Bump heights / TSV depth measurement, defect inspection, topology, layer thickness, wafer thickness & bow/ warp (VIS), wafer thickness (infrared), die warpage measurement, physical failure analysis
  • FIB / REM imaging

Sensor Development

  • Sensor design
  • Reliability and lifetime optimization
  • Standard and customer-specific packaging with integrated sensor data processing e.g. TO8,  packages with  media separation, molding
  • Characterization of pressure (10 m-100 Bar), gas and acceleration sensors (up to 40 g)
  • Overview sensor activities

The department WLSI has cleanrooms and laboratories with production-compatible equipment available at both sites. Beside the flexibility regarding the processing of different wafers sizes, both process lines are also  characterized by a high adaptability of the individual processes. The process line at ASSID is particularly tailored to realize production-related and industry-compatible development and processing.

Overview Equipment




WLSI completely ISO 9001:2015 certified !

Since May 2018, the department WLSI is holding the ISO 9001:2015 certificate for both its sites - in Berlin and Dresden.

The department has thus completed the process of adjusting it's complete management processes to fulfill the strict requirements of the cerfification after the WLSI part ASSID set a good example in 2015 when it first received the ISO 9001 certificate for its site in Dresden.


Upcoming Events

Meet Faunhofer IZM and its department WLSI at the following events:

ECTC 2018
May 29th-June 1st, San Diego
Visit IZMs courses and talks

SMT Hybrid Packaging
June 5-7, 2018, Nuremberg, Germany
Booth 4-258

Sensor + Test
June 26-28, 2018, Nuremberg, Germany
Booth 5-248




Thee 2017 edition of the annual International Wafer Level Packaging Conference in San Jose, CA, has recognized the work of Dr. Wolfram Steller with not one, but two Best Paper Awards: „Best of Conference Paper“ and„Best of 3D Track Paper“ for his paper "Dual Side Chip Cooling Realized by Microfluidic Interposer Processing on 300mm Wafer Diameter".




The Fraunhofer Cluster 3D Integration wins the “2016 3D InCites Awards for Excellence in 3D Packaging Technologies” in the category “Research Institute of the Year". The award was presented on July 12th, 2016 in San Francisco.  



Research Network "Functional Integration in Micro and Nanoelectronics"

Fraunhofer, TU Dresden and TU Chemnitz cluster their competencies in the fields of micro / nano electronics. Research know-how will – in close cooperation with resident companies – be extended and innovations can be implemented more  quickly into applications and products.  

More Information

Overview Contact Persons

Quickly find the right expert for your question & request.


WLSI is involved in a lot of national and international projects. An excerpt of these will show you our expertise and achievements.



WLSI is regularly presenting latest research results at conferences and exhibitions. Have a closer look at some Exhibits.

Brochures and Presentations

Find brochures for your general or specific information.

ISO 9001

Since 05/2015 the department part “ASSID” in Moritzburg is working with a ISO 9001 certified management system to guarantee high quality standards.

Furthermore, in May 2018, the WLSI department part in Berlin has also received the ISO 9001:2015 certificate.


Corporate Video IZM-ASSID